Customer Satisfaction Essay

Introduction The need to measure customer satisfaction is essential for any organization. PART understands the importance of building and effectively managing the relationship with riders. To do so it needs to understand and meet rider expectations. It is imperative to identify the parameters which cause customer satisfaction or dissatisfaction and continuously measure them to bring about the changes needed on the basis of customer perceptions. Objectives The Primary objective of the Customer Satisfaction Survey is to determine satisfaction levels of PART Express riders. Secondary objectives are to determine ridership demographics, price sensitivity, what marketing channel is best to target respondents, the level of satisfaction on specific PART attributes, and determine ways PART can improve services. Determining ridership demographics will aid PART in understanding its current customers, as well as identifying target markets. Understanding which marketing channel works best to gain riders will give PART an indication of where to focus strategic marketing efforts. Attribute levels will break down each element of the PART experience and allow respondents to rate each task, giving detailed information beneficial for improving customer satisfaction. Methodology PART targeted existing Express riders for the customer satisfaction survey. Surveys were distributed to all Express routes, PART’s email list, Facebook, Twitter, as well as posted on the homepage of the PART website; designated to capture a demographic mix of respondents. 530 completed surveys were received and analyzed. Respondents are estimated to be roughly 50% of ridership and constitute an adequate survey sample size. The survey consisted of 19 questions, formatted as open ended, 5 point Likert Scale, basic demographics, and numerical questions (Appendix A). Respondent Profile Based on the demographic information received on the survey, it has been concluded that 60.5% of respondents were female and 39.4% male (Figure 1). The prevalent age range, at 26.9% was 55-64 years old (Figure 1). 72.2% of the respondents answered full time for their employment status, 21.5% and chose $30,000$44,999 as their annual income (Figure 3). When asked â€Å"which best describes your race?† respondents answered 61.6% White, 31.3% Black, and 7.1% Other (Figure 2). Based on the open-ended question of â€Å"Where do you  work†, 418 determined the top 5 largest employers. Baptist Hospital was the largest with 93 responses, Wells Fargo, UNCG, and GTCC were second with 14 responses each, Forsyth Medical Center and BB&T were third with 10 responses, Forsyth Tech Community College was fourth with 8 responses, Moses Cone and Tyco both came in fifth with 7 responses (Figure 2). Findings When respondents were asked to â€Å"Rate your level of satisfaction with PART†, 92.4% responded Somewhat to Highly Satisfied. 4.5% were Neutral, 2.2% responded Dissatisfied and less than < 1% were Very Dissatisfied (Figure 3). When asked â€Å"How long have you used PART services?† 22.8% answered less than 6 months, 13.5% answered 6 months to 1 year, 32% answered 1 to 3 years, 23.3% answered 3 to 5 years, and 8.1% answered 5 years or more (Figure 4). 56.7% of the respondents stated that they rode PART every day (Figure 5). The Routes which showed highest were Surry Express with 32.8% ridership, Greensboro Express with 30% ridership and Winston-Salem Express with 28.3% ridership (Figure 6). To determine price sensitivity a few new questions about fares were added to the survey this year. When asked â€Å"If you drove to work each day, how much would it cost?† 29.6% of respondents answered $15.00-$30.00. This was calculated by multiplying the daily round trip miles by 51 cents. The average PART rider saves $5,850 per year by riding. (Avg. Cost $22.50 times 260 work days per year) Of the 530 respondents 77.7% responded that $2.40 One-Way/$74.50 31-Day Pass was a fair price to ride PART Express (Figure 9). Nearly half of the respondents felt that they received a good value for the cost of the service (Figure 10). An attribute table was used to measure the satisfaction level of PART Express riders from the following categories: customer service, professionalism, quality of transportation, understanding customers’ needs, bus operator performance, PART Hub staff performance, price, and convenience of transportation. These attributes seem to be going down in satisfaction rating since last year. (Figure 7). To help identify the best channel for reaching new PART Express riders, respondents were asked â€Å"Which PART marketing tools have you seen/heard?† TV Commercials surpassed all other channels with 63.7%, the Email Messages was second highest with 42.8%, and 35.6% of respondents heard about PART through Billboards (Figure 8). When asked â€Å"What is the best way to communicate with you?† respondents requested that Email Messages and Flyers inside the buses was the best way to reach them (Figure10). Recommendations PART will review survey responses and categorize results to distribute to appropriate departments for further examination. After reviewing survey responses, areas of improvement will be identified. With demographic information attained about PART Express riders, it is recommended that the results be used by the Marketing department to promote PART services to retain current riders, and to acquire potential riders. A demographic profile of the PART typical rider has been determined and should be used as a reference for marketing purposes, to determine the characteristics and interests of the majority of current PART Express Riders. Many route, schedule and service recommendations were suggested and will be reviewed. From these suggestions PART should determine if changes suggested, are necessary and need to be made to existing routes. Potential areas that are not currently served need to be examined to see if there is potential ridership available. The Customer Satisfaction Survey will be conducted once per year during the fourth quarter of the PART fiscal year. Results to this survey will be publicized on the PART website and in a press release to the media.

Central Processing Unit and Memory Location

MICROPROCESSOR 8085 †¢ Reference Book: – Ramesh S. Goankar, â€Å"Microprocessor Architecture, Programming and Applications with 8085†, 5th Edition, Prentice Hall †¢ Week 1 – Basic Concept and Ideas about Microprocessor. †¢ Week 2 – Architecture of 8085 †¢ Week 3 – Addressing Modes and Instruction set of 8085 †¢ Week 4 – Interrupts of 8085 †¢ Week 5 onwards – Peripherals. Basic Concepts of Microprocessors †¢ Differences between: – Microcomputer – a computer with a microprocessor as its CPU. Includes memory, I/O etc. Microprocessor – silicon chip which includes ALU, register circuits & control circuits – Microcontroller – silicon chip which includes microprocessor, memory & I/O in a single package. What is a Microprocessor? †¢ The word comes from the combination micro and processor. – Processor means a device that processes whatever. In this context proces sor means a device that processes numbers, specifically binary numbers, 0’s and 1’s. †¢ To process means to manipulate. It is a general term that describes all manipulation. Again in this content, it means to perform certain operations on the numbers that depend on the microprocessor’s design.What about micro? †¢ Micro is a new addition. – In the late 1960’s, processors were built using discrete elements. †¢ These devices performed the required operation, but were too large and too slow. – In the early 1970’s the microchip was invented. All of the components that made up the processor were now placed on a single piece of silicon. The size became several thousand times smaller and the speed became several hundred times faster. The â€Å"Micro†Processor was born. Was there ever a â€Å"mini†processor? †¢ No. – It went directly from discrete elements to a single chip. However, omparing todayâ€⠄¢s microprocessors to the ones built in the early 1970’s you find an extreme increase in the amount of integration. †¢ So, What is a microprocessor? Definition of the Microprocessor The microprocessor is a programmable device that takes in numbers, performs on them arithmetic or logical operations according to the program stored in memory and then produces other numbers as a result. Definition (Contd. ) †¢ Lets expand each of the underlined words: – Programmable device: The microprocessor can perform different sets of operations on the data it receives depending on the sequence of instructions supplied in the given program.By changing the program, the microprocessor manipulates the data in different ways. – Instructions: Each microprocessor is designed to execute a specific group of operations. This group of operations is called an instruction set. This instruction set defines what the microprocessor can and cannot do. Definition (Contd. ) – Ta kes in: The data that the microprocessor manipulates must come from somewhere. †¢ It comes from what is called â€Å"input devices†. †¢ These are devices that bring data into the system from the outside world. †¢ These represent devices such as a keyboard, a mouse, switches, and the like.Definition (Contd. ) – Numbers: The microprocessor has a very narrow view on life. It only understands binary numbers. A binary digit is called a bit (which comes from binary digit). The microprocessor recognizes and processes a group of bits together. This group of bits is called a â€Å"word†. The number of bits in a Microprocessor’s word, is a measure of its â€Å"abilities†. Definition (Contd. ) – Words, Bytes, etc. †¢ The earliest microprocessor (the Intel 8088 and Motorola’s 6800) recognized 8-bit words. – They processed information 8-bits at a time. That’s why they are called â€Å"8-bit processors†.They can handle large numbers, but in order to process these numbers, they broke them into 8-bit pieces and processed each group of 8-bits separately. †¢ Later microprocessors (8086 and 68000) were designed with 16-bit words. – A group of 8-bits were referred to as a â€Å"half-word† or â€Å"byte†. – A group of 4 bits is called a â€Å"nibble†. – Also, 32 bit groups were given the name â€Å"long word†. †¢ Today, all processors manipulate at least 32 bits at a time and there exists microprocessors that can process 64, 80, 128 bits Definition (Contd. ) – Arithmetic and Logic Operations: Every microprocessor has arithmetic operations such as add and subtract as part of its instruction set. – Most microprocessors will have operations such as multiply and divide. – Some of the newer ones will have complex operations such as square root. †¢ In addition, microprocessors have logic operations as well. Such as AND, OR, XOR, shift left, shift right, etc. †¢ Again, the number and types of operations define the microprocessor’s instruction set and depends on the specific microprocessor. Definition (Contd. ) – Stored in memory : †¢ First, what is memory? – Memory is the location where information is kept while not in current use. Memory is a collection of storage devices. Usually, each storage device holds one bit. Also, in most kinds of memory, these storage devices are grouped into groups of 8. These 8 storage locations can only be accessed together. So, one can only read or write in terms of bytes to and form memory. – Memory is usually measured by the number of bytes it can hold. It is measured in Kilos, Megas and lately Gigas. A Kilo in computer language is 210 =1024. So, a KB (KiloByte) is 1024 bytes. Mega is 1024 Kilos and Giga is 1024 Mega. Definition (Contd. ) – Stored in memory: †¢ When a program is entered into a computer, it is st ored in memory.Then as the microprocessor starts to execute the instructions, it brings the instructions from memory one at a time. †¢ Memory is also used to hold the data. – The microprocessor reads (brings in) the data from memory when it needs it and writes (stores) the results into memory when it is done. Definition (Contd. ) – Produces: For the user to see the result of the execution of the program, the results must be presented in a human readable form. †¢ The results must be presented on an output device. †¢ This can be the monitor, a paper from the printer, a simple LED or many other forms. A Microprocessor-based systemFrom the above description, we can draw the following block diagram to represent a microprocessor-based system: Input Output Memory Inside The Microprocessor †¢ Internally, the microprocessor is made up of 3 main units. – The Arithmetic/Logic Unit (ALU) – The Control Unit. – An array of registers for holdi ng data while it is being manipulated. Organization of a microprocessorbased system †¢ Let’s expand the picture a bit. I/O Input / Output ALU Register Array System Bus Memory ROM RAM Control Memory †¢ Memory stores information such as instructions and data in binary format (0 and 1).It provides this information to the microprocessor whenever it is needed. †¢ Usually, there is a memory â€Å"sub-system† in a microprocessor-based system. This sub-system includes: – The registers inside the microprocessor – Read Only Memory (ROM) †¢ used to store information that does not change. – Random Access Memory (RAM) (also known as Read/Write Memory). †¢ used to store information supplied by the user. Such as programs and data. Memory Map and Addresses †¢ The memory map is a picture representation of the address range and shows where the different memory chips are located within the address range. 000 0000 EPROM 3FFF 4400 Address Range of EPROM Chip Address Range RAM 1 RAM 2 RAM 3 Address Range of 1st RAM Chip 5FFF 6000 Address Range of 2nd RAM Chip 8FFF 9000 A3FF A400 Address Range of 3rd RAM Chip RAM 4 F7FF FFFF Address Range of 4th RAM Chip Memory †¢ To execute a program: – the user enters its instructions in binary format into the memory. – The microprocessor then reads these instructions and whatever data is needed from memory, executes the instructions and places the results either in memory or produces it on an output device. The three cycle instruction execution model To execute a program, the microprocessor â€Å"reads† each instruction from memory, â€Å"interprets† it, then â€Å"executes† it. †¢ To use the right names for the cycles: – The microprocessor fetches each instruction, – decodes it, – Then executes it. †¢ This sequence is continued until all instructions are performed. Machine Language †¢ The number of bits tha t form the â€Å"word† of a microprocessor is fixed for that particular processor. – These bits define a maximum number of combinations. †¢ For example an 8-bit microprocessor can have at most 28 = 256 different combinations. However, in most microprocessors, not all of these combinations are used. – Certain patterns are chosen and assigned specific meanings. – Each of these patterns forms an instruction for the microprocessor. – The complete set of patterns makes up the microprocessor’s machine language. The 8085 Machine Language †¢ The 8085 (from Intel) is an 8-bit microprocessor. – The 8085 uses a total of 246 bit patterns to form its instruction set. – These 246 patterns represent only 74 instructions. †¢ The reason for the difference is that some (actually most) instructions have multiple different formats. Because it is very difficult to enter the bit patterns correctly, they are usually entered in hexadeci mal instead of binary. †¢ For example, the combination 0011 1100 which translates into â€Å"increment the number in the register called the accumulator†, is usually entered as 3C. Assembly Language †¢ Entering the instructions using hexadecimal is quite easier than entering the binary combinations. – However, it still is difficult to understand what a program written in hexadecimal does. – So, each company defines a symbolic code for the instructions. – These codes are called â€Å"mnemonics†. The mnemonic for each instruction is usually a group of letters that suggest the operation performed. Assembly Language †¢ Using the same example from before, – 00111100 translates to 3C in hexadecimal (OPCODE) – Its mnemonic is: â€Å"INR A†. – INR stands for â€Å"increment register† and A is short for accumulator. †¢ Another example is: 1000 0000, – Which translates to 80 in hexadecimal. â€⠀œ Its mnemonic is â€Å"ADD B†. – â€Å"Add register B to the accumulator and keep the result in the accumulator†. Assembly Language †¢ It is important to remember that a machine language and its associated assembly language are completely machine dependent. In other words, they are not transferable from one microprocessor to a different one. †¢ For example, Motorolla has an 8-bit microprocessor called the 6800. – The 8085 machine language is very different from that of the 6800. So is the assembly language. – A program written for the 8085 cannot be executed on the 6800 and vice versa. â€Å"Assembling† The Program †¢ How does assembly language get translated into machine language? – There are two ways: – 1st there is â€Å"hand assembly†. †¢ The programmer translates each assembly language instruction into its equivalent hexadecimal code (machine language).Then the hexadecimal code is entered into memory. – The other possibility is a program called an â€Å"assembler†, which does the translation automatically. 8085 Microprocessor Architecture †¢ †¢ †¢ †¢ †¢ †¢ 8-bit general purpose  µp Capable of addressing 64 k of memory Has 40 pins Requires +5 v power supply Can operate with 3 MHz clock 8085 upward compatible Pins Power Supply: +5 V Frequency Generator is connected to those pins Input/Output/ Memory Read Write Multiplexed Address Data Bus Address latch Enable Address Bus †¢ System Bus – wires connecting memory & I/O to microprocessor – Address Bus Unidirectional †¢ Identifying peripheral or memory location – Data Bus †¢ Bidirectional †¢ Transferring data – Control Bus †¢ Synchronization signals †¢ Timing signals †¢ Control signal Architecture of Intel 8085 Microprocessor Intel 8085 Microprocessor †¢ Microprocessor consists of: – – – – – Control unit: control microprocessor operations. ALU: performs data processing function. Registers: provide storage internal to CPU. Interrupts Internal data bus The ALU †¢ In addition to the arithmetic & logic circuits, the ALU includes the accumulator, which is part of every arithmetic & logic operation. Also, the ALU includes a temporary register used for holding data temporarily during the execution of the operation. This temporary register is not accessible by the programmer. †¢ Registers – General Purpose Registers †¢ B, C, D, E, H & L (8 bit registers) †¢ Can be used singly †¢ Or can be used as 16 bit register pairs – BC, DE, HL †¢ H & L can be used as a data pointer (holds memory address) – Special Purpose Registers †¢ Accumulator (8 bit register) – Store 8 bit data – Store the result of an operation – Store 8 bit data during I/O transfer Accumulator Flags B C D E H L Program Counter Stack Pointer Address 6 8 Data †¢ Flag Register – 8 bit register – shows the status of the microprocessor before/after an operation – S (sign flag), Z (zero flag), AC (auxillary carry flag), P (parity flag) & CY (carry flag) D7 S D6 Z D5 X D4 AC D3 X D2 P D1 X D0 CY – Sign Flag †¢ Used for indicating the sign of the data in the accumulator †¢ The sign flag is set if negative (1 – negative) †¢ The sign flag is reset if positive (0 –positive) †¢ Zero Flag – Is set if result obtained after an operation is 0 – Is set following an increment or decrement operation of that register 10110011 + 01001101 ————–1 00000000 †¢ Carry Flag Is set if there is a carry or borrow from arithmetic operation 1011 0101 + 0110 1100 ————–Carry 1 0010 0001 1011 0101 – 1100 1100 ————–Borrow 1 1110 1001 †¢ Auxillary Carry Flag – Is set if there is a carry out of bit 3 †¢ Parity Flag – Is set if parity is even – Is cleared if parity is odd The Internal Architecture †¢ We have already discussed the general purpose registers, the Accumulator, and the flags. †¢ The Program Counter (PC) – This is a register that is used to control the sequencing of the execution of instructions. – This register always holds the address of the next instruction. Since it holds an address, it must be 16 bits wide. The Internal Architecture †¢ The Stack pointer – The stack pointer is also a 16-bit register that is used to point into memory. – The memory this register points to is a special area called the stack. – The stack is an area of memory used to hold data that will be retreived soon. – The stack is usually accessed in a Last In First Out (LIFO) fashion. Non Programmable Registers †¢ Instruction Register & Decoder – Inst ruction is stored in IR after fetched by processor – Decoder decodes instruction in IR Internal Clock generator – 3. 125 MHz internally – 6. 5 MHz externally The Address and Data Busses †¢ The address bus has 8 signal lines A8 – A15 which are unidirectional. †¢ The other 8 address bits are multiplexed (time shared) with the 8 data bits. – So, the bits AD0 – AD7 are bi-directional and serve as A0 – A7 and D0 – D7 at the same time. †¢ During the execution of the instruction, these lines carry the address bits during the early part, then during the late parts of the execution, they carry the 8 data bits. – In order to separate the address from the data, we can use a latch to save the value before the function of the bits changes. Demultiplexing AD7-AD0 From the above description, it becomes obvious that the AD7– AD0 lines are serving a dual purpose and that they need to be demultiplexed to get all the information. – The high order bits of the address remain on the bus for three clock periods. However, the low order bits remain for only one clock period and they would be lost if they are not saved externally. Also, notice that the low order bits of the address disappear when they are needed most. – To make sure we have the entire address for the full three clock cycles, we will use an external latch to save the value of AD7– AD0 when it is carrying the address bits.We use the ALE signal to enable this latch. Demultiplexing AD7-AD0 8085 A15-A8 ALE AD7-AD0 Latch A7- A0 D7- D0 – Given that ALE operates as a pulse during T1, we will be able to latch the address. Then when ALE goes low, the address is saved and the AD7– AD0 lines can be used for their purpose as the bi-directional data lines. Demultiplexing the Bus AD7 – AD0 †¢ †¢ †¢ †¢ The high order address is placed on the address bus and hold for 3 clk periods, The low o rder address is lost after the first clk period, this address needs to be hold however we need to use latch The address AD7 – AD0 is connected as inputs to the latch 74LS373.The ALE signal is connected to the enable (G) pin of the latch and the OC – Output control – of the latch is grounded The Overall Picture †¢ Putting all of the concepts together, we get: A15- A10 Chip Selection Circuit 8085 A15-A8 ALE AD7-AD0 Latch CS A9- A0 A7- A0 1K Byte Memory Chip WR RD IO/M D7- D0 RD WR Introduction to 8085 Instructions The 8085 Instructions – Since the 8085 is an 8-bit device it can have up to 28 (256) instructions. †¢ However, the 8085 only uses 246 combinations that represent a total of 74 instructions. – Most of the instructions have more than one format. These instructions can be grouped into five different groups: †¢ †¢ †¢ †¢ †¢ Data Transfer Operations Arithmetic Operations Logic Operations Branch Operations Machin e Control Operations Instruction and Data Formats †¢ Each instruction has two parts. – The first part is the task or operation to be performed. †¢ This part is called the â€Å"opcode† (operation code). – The second part is the data to be operated on †¢ Called the â€Å"operand†. Data Transfer Operations – These operations simply COPY the data from the source to the destination. – MOV, MVI, LDA, and STA – They transfer: †¢ †¢ †¢ †¢ Data between registers.Data Byte to a register or memory location. Data between a memory location and a register. Data between an IO Device and the accumulator. – The data in the source is not changed. The LXI instruction †¢ The 8085 provides an instruction to place the 16-bit data into the register pair in one step. †¢ LXI Rp, (Load eXtended Immediate) – The instruction LXI B 4000H will place the 16-bit number 4000 into the register pair B, C. â₠¬ ¢ The upper two digits are placed in the 1st register of the pair and the lower two digits in the 2nd . B 40 00 C LXI B 40 00H The Memory â€Å"Register† Most of the instructions of the 8085 can use a memory location in place of a register. – The memory location will become the â€Å"memory† register M. †¢ MOV M B – copy the data from register B into a memory location. – Which memory location? †¢ The memory location is identified by the contents of the HL register pair. – The 16-bit contents of the HL register pair are treated as a 16-bit address and used to identify the memory location. Using the Other Register Pairs – There is also an instruction for moving data from memory to the accumulator without disturbing the contents of the H and L register. †¢ LDAX Rp (LoaD Accumulator eXtended) Copy the 8-bit contents of the memory location identified by the Rp register pair into the Accumulator. – This instruction o nly uses the BC or DE pair. – It does not accept the HL pair. Indirect Addressing Mode †¢ Using data in memory directly (without loading first into a Microprocessor’s register) is called Indirect Addressing. †¢ Indirect addressing uses the data in a register pair as a 16-bit address to identify the memory location being accessed. – The HL register pair is always used in conjunction with the memory register â€Å"M†. – The BC and DE register pairs can be used to load data into the Accumultor using indirect addressing.Arithmetic Operations – Addition (ADD, ADI): – Any 8-bit number. – The contents of a register. – The contents of a memory location. †¢ Can be added to the contents of the accumulator and the result is stored in the accumulator. – Subtraction (SUB, SUI): – Any 8-bit number – The contents of a register – The contents of a memory location †¢ Can be subtracted from the contents of the accumulator. The result is stored in the accumulator. Arithmetic Operations Related to Memory †¢ These instructions perform an arithmetic operation using the contents of a memory location while they are still in memory. ADD – SUB – INR M M M / DCR M †¢ Add the contents of M to the Accumulator †¢ Sub the contents of M from the Accumulator †¢ Increment/decrement the contents of the memory location in place. – All of these use the contents of the HL register pair to identify the memory location being used. Arithmetic Operations – Increment (INR) and Decrement (DCR): †¢ The 8-bit contents of any memory location or any register can be directly incremented or decremented by 1. †¢ No need to disturb the contents of the accumulator. Manipulating Addresses †¢ Now that we have a 16-bit address in a register pair, how do we manipulate it? It is possible to manipulate a 16-bit address stored in a register pair as one entity using some special instructions. †¢ INX Rp †¢ DCX Rp (Increment the 16-bit number in the register pair) (Decrement the 16-bit number in the register pair) – The register pair is incremented or decremented as one entity. No need to worry about a carry from the lower 8-bits to the upper. It is taken care of automatically. Logic Operations †¢ These instructions perform logic operations on the contents of the accumulator. – ANA, ANI, ORA, ORI, XRA and XRI †¢ Source: Accumulator and – An 8-bit number – The contents of a register – The contents of a memory location Destination: Accumulator ANA R/M ANI # ORA ORI XRA XRI R/M # R/M # AND Accumulator With Reg/Mem AND Accumulator With an 8-bit number OR Accumulator With Reg/Mem OR Accumulator With an 8-bit number XOR Accumulator With Reg/Mem XOR Accumulator With an 8-bit number Logic Operations – Complement: †¢ 1’s complement of the contents of the accumulato r. CMA No operand Additional Logic Operations †¢ Rotate – Rotate the contents of the accumulator one position to the left or right. – RLC – RAL – RRC – RAR Rotate the accumulator left. Bit 7 goes to bit 0 AND the Carry flag. Rotate the accumulator left through the carry.Bit 7 goes to the carry and carry goes to bit 0. Rotate the accumulator right. Bit 0 goes to bit 7 AND the Carry flag. Rotate the accumulator right through the carry. Bit 0 goes to the carry and carry goes to bit 7. RLC vs. RLA Carry Flag †¢ RLC 7 6 5 4 3 2 1 0 Accumulator Carry Flag †¢ RAL 7 6 5 4 3 2 1 0 Accumulator Logical Operations †¢ Compare †¢ Compare the contents of a register or memory location with the contents of the accumulator. – CMP R/M Compare the contents of the register or memory location to the contents of the accumulator. Compare the 8-bit number to the contents of the accumulator. CPI # †¢ The compare instruction sets the flag s (Z, Cy, and S). †¢ The compare is done using an internal subtraction that does not change the contents of the accumulator. A – (R / M / #) Branch Operations †¢ Two types: – Unconditional branch. †¢ Go to a new location no matter what. – Conditional branch. †¢ Go to a new location if the condition is true. Unconditional Branch – JMP Address †¢ Jump to the address specified (Go to). – CALL Address †¢ Jump to the address specified but treat it as a subroutine. – RET †¢ Return from a subroutine. – The addresses supplied to all branch operations must be 16-bits.Conditional Branch – Go to new location if a specified condition is met. †¢ JZ Address (Jump on Zero) – Go to address specified if the Zero flag is set. †¢ JNZ Address (Jump on NOT Zero) – Go to address specified if the Zero flag is not set. †¢ JC Address (Jump on Carry) – Go to the address specified if the Carry flag is set. †¢ JNC Address (Jump on No Carry) – Go to the address specified if the Carry flag is not set. †¢ JP †¢ JM Address (Jump on Plus) Address (Jump on Minus) – Go to the address specified if the Sign flag is not set – Go to the address specified if the Sign flag is set.Machine Control – HLT †¢ Stop executing the program. – NOP †¢ No operation †¢ Exactly as it says, do nothing. †¢ Usually used for delay or to replace instructions during debugging. Operand Types †¢ There are different ways for specifying the operand: – There may not be an operand (implied operand) †¢ CMA – The operand may be an 8-bit number (immediate data) †¢ ADI 4FH – The operand may be an internal register (register) †¢ SUB B – The operand may be a 16-bit address (memory address) †¢ LDA 4000H Instruction Size †¢ Depending on the operand type, the instruction may have diff erent sizes.It will occupy a different number of memory bytes. – Typically, all instructions occupy one byte only. – The exception is any instruction that contains immediate data or a memory address. †¢ Instructions that include immediate data use two bytes. – One for the opcode and the other for the 8-bit data. †¢ Instructions that include a memory address occupy three bytes. – One for the opcode, and the other two for the 16-bit address. Instruction with Immediate Date †¢ Operation: Load an 8-bit number into the accumulator. – MVI A, 32 †¢ Operation: MVI A †¢ Operand: The number 32 †¢ Binary Code: 0011 1110 3E 1st byte. 011 0010 32 2nd byte. Instruction with a Memory Address †¢ Operation: go to address 2085. – Instruction: JMP 2085 †¢ Opcode: JMP †¢ Operand: 2085 †¢ Binary code: 1100 0011 C3 1000 0101 85 0010 0000 20 1st byte. 2nd byte 3rd byte Addressing Modes †¢ The microprocessor ha s different ways of specifying the data for the instruction. These are called â€Å"addressing modes†. †¢ The 8085 has four addressing modes: – – – – Implied Immediate Direct Indirect CMA MVI B, 45 LDA 4000 LDAX B †¢ Load the accumulator with the contents of the memory location whose address is stored in the register pair BC). Data Formats In an 8-bit microprocessor, data can be represented in one of four formats: †¢ †¢ †¢ †¢ ASCII BCD Signed Integer Unsigned Integer. – It is important to recognize that the microprocessor deals with 0’s and 1’s. †¢ It deals with values as strings of bits. †¢ It is the job of the user to add a meaning to these strings. Data Formats †¢ Assume the accumulator contains the following value: 0100 0001. – There are four ways of reading this value: †¢ It is an unsigned integer expressed in binary, the equivalent decimal number would be 65. †¢ It is a number expressed in BCD (Binary Coded Decimal) format. That would make it, 41. It is an ASCII representation of a letter. That would make it the letter A. †¢ It is a string of 0’s and 1’s where the 0th and the 6th bits are set to 1 while all other bits are set to 0. ASCII stands for American Standard Code for Information Interchange. Counters & Time Delays Counters †¢ A loop counter is set up by loading a register with a certain value †¢ Then using the DCR (to decrement) and INR (to increment) the contents of the register are updated. †¢ A loop is set up with a conditional jump instruction that loops back or not depending on whether the count has reached the termination count.Counters †¢ The operation of a loop counter can be described using the following flowchart. Initialize Body of loop Update the count No Is this Final Count? Yes Sample ALP for implementing a loop Using DCR instruction MVI C, 15H LOOP DCR C JNZ LOOP Using a Regist er Pair as a Loop Counter †¢ Using a single register, one can repeat a loop for a maximum count of 255 times. †¢ It is possible to increase this count by using a register pair for the loop counter instead of the single register. – A minor problem arises in how to test for the final count since DCX and INX do not modify the flags. However, if the loop is looking for when the count becomes zero, we can use a small trick by ORing the two registers in the pair and then checking the zero flag. Using a Register Pair as a Loop Counter †¢ The following is an example of a loop set up with a register pair as the loop counter. LXI B, 1000H LOOP DCX B MOV A, C ORA B JNZ LOOP Delays †¢ It was shown in Chapter 2 that each instruction passes through different combinations of Fetch, Memory Read, and Memory Write cycles. †¢ Knowing the combinations of cycles, one can calculate how long such an instruction would require to complete. The table in Appendix F of the book contains a column with the title B/M/T. – B for Number of Bytes – M for Number of Machine Cycles – T for Number of T-State. Delays †¢ Knowing how many T-States an instruction requires, and keeping in mind that a T-State is one clock cycle long, we can calculate the time using the following formula: Delay = No. of T-States / Frequency †¢ For example a â€Å"MVI† instruction uses 7 T-States. Therefore, if the Microprocessor is running at 2 MHz, the instruction would require 3. 5  µSeconds to complete. Delay loops †¢ We can use a loop to produce a certain amount of time delay in a program. The following is an example of a delay loop: MVI C, FFH LOOP DCR C JNZ LOOP 7 T-States 4 T-States 10 T-States †¢ The first instruction initializes the loop counter and is executed only once requiring only 7 T-States. †¢ The following two instructions form a loop that requires 14 T-States to execute and is repeated 255 times until C becomes 0. Del ay Loops (Contd. ) †¢ We need to keep in mind though that in the last iteration of the loop, the JNZ instruction will fail and require only 7 T-States rather than the 10. †¢ Therefore, we must deduct 3 T-States from the total delay to get an accurate delay calculation. To calculate the delay, we use the following formula: Tdelay = TO + TL – Tdelay = total delay – TO = delay outside the loop – TL = delay of the loop †¢ TO is the sum of all delays outside the loop. Delay Loops (Contd. ) †¢ Using these formulas, we can calculate the time delay for the previous example: †¢ TO = 7 T-States – Delay of the MVI instruction †¢ TL = (14 X 255) – 3 = 3567 T-States – 14 T-States for the 2 instructions repeated 255 times (FF16 = 25510) reduced by the 3 T-States for the final JNZ. Using a Register Pair as a Loop Counter †¢ Using a single register, one can repeat a loop for a maximum count of 255 times. It is possible to increase this count by using a register pair for the loop counter instead of the single register. – A minor problem arises in how to test for the final count since DCX and INX do not modify the flags. – However, if the loop is looking for when the count becomes zero, we can use a small trick by ORing the two registers in the pair and then checking the zero flag. Using a Register Pair as a Loop Counter †¢ The following is an example of a delay loop set up with a register pair as the loop counter. LXI B, 1000H LOOP DCX B MOV A, C ORA B JNZ LOOP 10 T-States 6 T-States 4 T-States 4 T-States 10 T-StatesUsing a Register Pair as a Loop Counter †¢ Using the same formula from before, we can calculate: †¢ TO = 10 T-States – The delay for the LXI instruction †¢ TL = (24 X 4096) – 3 = 98301 T- States – 24 T-States for the 4 instructions in the loop repeated 4096 times (100016 = 409610) reduced by the 3 TStates for the JNZ in the last iterat ion. Nested Loops †¢ Nested loops can be easily setup in Assembly language by using two registers for the two loop counters and updating the right register in the right loop. – In the figure, the body of loop2 can be before or after loop1.Initialize loop 2 Body of loop 2 Initialize loop 1 Body of loop 1 Update the count1 No Is this Final Count? Yes Update the count 2 No Is this Final Count? Yes Nested Loops for Delay †¢ Instead (or in conjunction with) Register Pairs, a nested loop structure can be used to increase the total delay produced. MVI B, 10H LOOP2 MVI C, FFH LOOP1 DCR C JNZ LOOP1 DCR B JNZ LOOP2 7 T-States 7 T-States 4 T-States 10 T-States 4 T-States 10 T-States Delay Calculation of Nested Loops †¢ The calculation remains the same except that it the formula must be applied recursively to each loop. Start with the inner loop, then plug that delay in the calculation of the outer loop. †¢ Delay of inner loop – TO1 = 7 T-States †¢ MVI C, FFH instruction – TL1 = (255 X 14) – 3 = 3567 T-States †¢ 14 T-States for the DCR C and JNZ instructions repeated 255 Delay Calculation of Nested Loops †¢ Delay of outer loop – TO2 = 7 T-States †¢ MVI B, 10H instruction – TL1 = (16 X (14 + 3574)) – 3 = 57405 T-States †¢ 14 T-States for the DCR B and JNZ instructions and 3574 T-States for loop1 repeated 16 times (1016 = 1610) minus 3 for the final JNZ. – TDelay = 7 + 57405 = 57412 T-States †¢ Total Delay – TDelay = 57412 X 0. 5  µSec = 28. 06 mSec Increasing the delay †¢ The delay can be further increased by using register pairs for each of the loop counters in the nested loops setup. †¢ It can also be increased by adding dummy instructions (like NOP) in the body of the loop. Timing Diagram Representation of Various Control signals generated during Execution of an Instruction. Following Buses and Control Signals must be shown in a Timing Diagram: â € ¢Higher Order Address Bus. †¢Lower Address/Data bus †¢ALE †¢RD †¢WR †¢IO/M Timing Diagram Instruction: A000h MOV A,B Corresponding Coding: A000h 78 Timing Diagram Instruction: A000h MOV A,B Corresponding Coding: A000h 78OFC 8085 Memory Timing Diagram Instruction: A000h MOV A,B 00h T1 T2 T3 T4 A0h A15- A8 (Higher Order Address bus) Corresponding Coding: A000h 78 78h ALE RD OFC WR 8085 Memory IO/M Op-code fetch Cycle Timing Diagram Instruction: A000h MVI A,45h Corresponding Coding: A000h A001h 3E 45 Timing Diagram Instruction: A000h MVI A,45h OFC MEMR Corresponding Coding: A000h A001h 3E 45 8085 Memory Timing Diagram T1 T2 T3 T4 T5 T6 T7 A0h A0h A15- A8 (Higher Order Address bus) 00h 3Eh 01h 45h DA7-DA0 (Lower order address/data Bus) Instruction: A000h MVI A,45h Corresponding Coding: A000h A001h 3E 45 WR RD ALEIO/M Op-Code Fetch Cycle Memory Read Cycle Timing Diagram Instruction: A000h LXI A,FO45h Corresponding Coding: A000h A001h A002h 21 45 F0 Timing Dia gram Instruction: A000h LXI A,FO45h OFC MEMR MEMR Corresponding Coding: A000h A001h A002h 21 45 F0 8085 Memory Timing Diagram Op-Code Fetch Cycle Memory Read Cycle Memory Read Cycle T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 A0h A0h A0h A15- A8 (Higher Order Address bus) 00h 21h 01h 45h 02h F0h DA7-DA0 (Lower order address/data Bus) ALE RD WR IO/M Timing Diagram Instruction: A000h MOV A,M Corresponding Coding: A000h 7E Timing Diagram Instruction: A000h MOV A,MOFC MEMR Corresponding Coding: A000h 7E 8085 Memory Timing Diagram T1 T2 T3 T4 T5 T6 T7 A0h Content Of Reg H A15- A8 (Higher Order Address bus) Instruction: A000h MOV A,M Corresponding Coding: A000h 7E 00h 7Eh L Reg Content Of M DA7-DA0 (Lower order address/data Bus) ALE RD WR IO/M Op-Code Fetch Cycle Memory Read Cycle Timing Diagram Instruction: A000h MOV M,A Corresponding Coding: A000h 77 Timing Diagram Instruction: A000h MOV M,A OFC MEMW Corresponding Coding: A000h 77 8085 Memory Timing Diagram T1 T2 T3 T4 T5 T6 T7 A0h Content Of Reg H A15- A8 (Higher Order Address bus)Instruction: A000h MOV M,A Corresponding Coding: A000h 77 00h 7Eh L Reg Content of Reg A DA7-DA0 (Lower order address/data Bus) ALE RD WR IO/M Op-Code Fetch Cycle Memory Write Cycle Chapter 9 Stack and Subroutines The Stack †¢ The stack is an area of memory identified by the programmer for temporary storage of information. †¢ The stack is a LIFO structure. – Last In First Out. †¢ The stack normally grows backwards into memory. – In other words, the programmer defines the bottom of the stack and the stack grows up into reducing address range. The Stack grows backwards into memory Memory Bottom of the Stack The Stack Given that the stack grows backwards into memory, it is customary to place the bottom of the stack at the end of memory to keep it as far away from user programs as possible. †¢ In the 8085, the stack is defined by setting the SP (Stack Pointer) register. LXI SP, FFFFH †¢ This sets the Stack Pointer to location FFFFH (end of memory for the 8085). Saving Information on the Stack †¢ Information is saved on the stack by PUSHing it on. – It is retrieved from the stack by POPing it off. †¢ The 8085 provides two instructions: PUSH and POP for storing information on the stack and retrieving it back. – Both PUSH and POP work with register pairs ONLY.The PUSH Instruction †¢ PUSH B – Decrement SP – Copy the contents of register B to the memory location pointed to by SP – Decrement BSP C F3 12 – Copy the contents of register C to the memory location pointed to by SP F3 FFFB FFFC FFFD FFFE FFFF 12 SP The POP Instruction †¢ POP D – Copy the contents of the memory location pointed to by the SP to register E – Increment SP – Copy the contents of the memory location D E F3 12 pointed to by the SP to register D – Increment SP F3 SP FFFB FFFC FFFD FFFE FFFF 12 Operation of the Stack †¢ During pushing, the stack operates in a â€Å"decrement then store† style. The stack pointer is decremented first, then the information is placed on the stack. †¢ During poping, the stack operates in a â€Å"use then increment† style. – The information is retrieved from the top of the the stack and then the pointer is incremented. †¢ The SP pointer always points to â€Å"the top of the stack†. LIFO †¢ The order of PUSHs and POPs must be opposite of each other in order to retrieve information back into its original location. PUSH B PUSH D †¦ POP D POP B The PSW Register Pair †¢ The 8085 recognizes one additional register pair called the PSW (Program Status Word). This register pair is made up of the Accumulator and the Flags registers. †¢ It is possible to push the PSW onto the stack, do whatever operations are needed, then POP it off of the stack. – The result is that the contents of the Accumulator and the status of the Flags are ret urned to what they were before the operations were executed. Subroutines †¢ A subroutine is a group of instructions that will be used repeatedly in different locations of the program. – Rather than repeat the same instructions several times, they can be grouped into a subroutine that is called from the different locations. In Assembly language, a subroutine can exist anywhere in the code. – However, it is customary to place subroutines separately from the main program. Subroutines †¢ The 8085 has two instructions for dealing with subroutines. – The CALL instruction is used to redirect program execution to the subroutine. – The RTE insutruction is used to return the execution to the calling routine. The CALL Instruction †¢ CALL 4000H – Push the address of the instruction immediately following the CALL onto the stack 2000 CALL 4000 2003 counter – Load the program PC 2 0 0 3with the 16-bit address supplied with the CALL instructi on. FFFB FFFC FFFD FFFE FFFF 3 20 SP The RTE Instruction †¢ RTE – Retrieve the return address from the top of the stack – Load the program counter with the return address. 2003 PC 4014 4015 †¦ RTE FFFB FFFC FFFD FFFE FFFF 03 20 SP Cautions †¢ The CALL instruction places the return address at the two memory locations immediately before where the Stack Pointer is pointing. – You must set the SP correctly BEFORE using the CALL instruction. †¢ The RTE instruction takes the contents of the two memory locations at the top of the stack and uses these as the return address. – Do not modify the stack pointer in a subroutine. You will loose the return address.Passing Data to a Subroutine †¢ In Assembly Language data is passed to a subroutine through registers. – The data is stored in one of the registers by the calling program and the subroutine uses the value from the register. †¢ The other possibility is to use agreed upon mem ory locations. – The calling program stores the data in the memory location and the subroutine retrieves the data from the location and uses it. Call by Reference and Call by Value †¢ If the subroutine performs operations on the contents of the registers, then these modifications will be transferred back to the calling program upon returning from a subroutine. Call by reference †¢ If this is not desired, the subroutine should PUSH all the registers it needs on the stack on entry and POP them on return. – The original values are restored before execution returns to the calling program. Cautions with PUSH and POP †¢ PUSH and POP should be used in opposite order. †¢ There has to be as many POP’s as there are PUSH’s. – If not, the RET statement will pick up the wrong information from the top of the stack and the program will fail. †¢ It is not advisable to place PUSH or POP inside a loop. Conditional CALL and RTE Instructions à ¢â‚¬ ¢ The 8085 supports conditional CALL and conditional RTE instructions. The same conditions used with conditional JUMP instructions can be used. – – – – – CC, call subroutine if Carry flag is set. CNC, call subroutine if Carry flag is not set RC, return from subroutine if Carry flag is set RNC, return from subroutine if Carry flag is not set Etc. A Proper Subroutine †¢ According to Software Engineering practices, a proper subroutine: – Is only entered with a CALL and exited with an RTE – Has a single entry point †¢ Do not use a CALL statement to jump into different points of the same subroutine. – Has a single exit point †¢ There should be one return statement from any subroutine. Following these rules, there should not be any confusion with PUSH and POP usage. The Design and Operation of Memory Memory in a microprocessor system is where information (data and instructions) is kept. It can be classified into t wo main types: ? ? Main memory (RAM and ROM) Storage memory (Disks , CD ROMs, etc. ) The simple view of RAM is that it is made up of registers that are made up of flip-flops (or memory elements). ? ROM on the other hand uses diodes instead of the flip-flops to permanently hold the information. The number of flip-flops in a â€Å"memory register† determines the size of the memory word. Accessing Information in Memory For the microprocessor to access (Read or Write) information in memory (RAM or ROM), it needs to do the following: Select the right memory chip (using part of the address bus). Identify the memory location (using the rest of the address bus). Access the data (using the data bus). 2 Tri-State Buffers An important circuit element that is used extensively in memory. This buffer is a logic circuit that has three states: Logic 0, logic1, and high impedance. When this circuit is in high impedance mode it looks as if it is disconnected from the output completely.The Outp ut is Low The Output is High High Impedance 3 The Tri-State Buffer This circuit has two inputs and one output. The first input behaves like the normal input for the circuit. The second input is an â€Å"enable†. ? ? If it is set high, the output follows the proper circuit behavior. If it is set low, the output looks like a wire connected to nothing. Output Input OR Input Output Enable Enable 4 The Basic Memory Element The basic memory element is similar to a D latch. This latch has an input where the data comes in. It has an enable input and an output on which data comes out. Data Input D Data Output QEnable EN 5 The Basic Memory Element However, this is not safe. Data is always present on the input and the output is always set to the contents of the latch. To avoid this, tri-state buffers are added at the input and output of the latch. Data Input D Data Output Q RD Enable EN WR 6 The Basic Memory Element The WR signal controls the input buffer. The bar over WR means that thi s is an active low signal. So, if WR is 0 the input data reaches the latch input. If WR is 1 the input of the latch looks like a wire connected to nothing. The RD signal controls the output in a similar manner. A Memory â€Å"Register† If we take four of these latches and connect them together, we would have a 4-bit memory register I0 WR I1 I2 I3 D Q EN EN RD D Q EN D Q EN D Q EN O0 O1 O2 O3 8 A group of memory registers D0 o D1 o o D2 o D3 WR D EN Q D EN Q D EN Q D EN Q D Q D EN Q D EN Q D EN Q Expanding on this scheme to add more memory registers we get the diagram to the right. EN D EN Q D EN Q D EN Q D EN Q D EN Q D EN Q D EN Q D EN Q o o o o RD D0 D1 D2 9 D3 Externally Initiated Operations External devices can initiate (start) one of the 4 following operations: Reset ?All operations are stopped and the program counter is reset to 0000. The microprocessor’s operations are interrupted and the microprocessor executes what is called a â€Å"service routine†. Th is routine â€Å"handles† the interrupt, (perform the necessary operations). Then the microprocessor returns to its previous operations and continues. Interrupt ? ? 10 A group of Memory Registers If we represent each memory location (Register) as a block we get the following I0 I1 I2 I3 WR EN0 EN1 EN2 EN3 RD O0 Input Buffers Memory Reg. 0 Memory Reg. 1 Memory Reg. 2 Memory Reg. 3 Output Buffers O1 O2 O3 11The Design of a Memory Chip Using the RD and WR controls we can determine the direction of flow either into or out of memory. Then using the appropriate Enable input we enable an individual memory register. What we have just designed is a memory with 4 locations and each location has 4 elements (bits). This memory would be called 4 X 4 [Number of location X number of bits per location]. 12 The Enable Inputs How do we produce these enable line? Since we can never have more than one of these enables active at the same time, we can have them encoded to reduce the number of line s coming into the chip.These encoded lines are the address lines for memory. 13 The Design of a Memory Chip So, the previous diagram would now look like the following: I I I I 0 1 2 3 WR A d d r e s s D e c o d e r Input Buffers Memory Reg. 0 Memory Reg. 1 Memory Reg. 2 Memory Reg. 3 Output Buffers A1 A0 RD O0 O1 O2 O3 14 The Design of a Memory Chip Since we have tri-state buffers on both the inputs and outputs of the flip flops, we can actually use one set of pins only. Input Buffers WR A1 A0 A D The chip Memory Reg. now look likeDthis: would 0 d e 0 D0 A1 A0 D1 D2 D3 d r e s s c o d e r Memory Reg. 1 Memory Reg. 2 Memory Reg. Output Buffers D1 D2 D3 RD RD WR 15 The steps of writing into Memory What happens when the programmer issues the STA instruction? The microprocessor would turn on the WR control (WR = 0) and turn off the RD control (RD = 1). The address is applied to the address decoder which generates a single Enable signal to turn on only one of the memory registers. The da ta is then applied on the data lines and it is stored into the enabled register. 16 Dimensions of Memory Memory is usually measured by two numbers: its length and its width (Length X Width). ? ? The length is the total number of locations.The width is the number of bits in each location. The length (total number of locations) is a function of the number of address lines. # of memory locations = 2( # of address lines) 210 = 1024 locations (1K) ? So, a memory chip with 10 address lines would have Looking at it from the other side, a memory chip with 4K locations would need ? Log2 4096=12 address lines 17 The 8085 and Memory The 8085 has 16 address lines. That means it can address 216 = 64K memory locations. Then it will need 1 memory chip with 64 k locations, or 2 chips with 32 K in each, or 4 with 16 K each or 16 of the 4 K chips, etc. ow would we use these address lines to control the multiple chips? 18 Chip Select Usually, each memory chip has a CS (Chip Select) input. The chip wil l only work if an active signal is applied on that input. To allow the use of multiple chips in the make up of memory, we need to use a number of the address lines for the purpose of â€Å"chip selection†. These address lines are decoded to generate the 2n necessary CS inputs for the memory chips to be used. 19 Chip Selection Example Assume that we need to build a memory system made up of 4 of the 4 X 4 memory chips we designed earlier.We will need to use 2 inputs and a decoder to identify which chip will be used at what time. The resulting design would now look like the one on the following slide. 20 Chip Selection Example RD WR D0 D1 RD WR A0 A1 CS RD WR A0 A1 CS RD WR A0 A1 CS RD WR A0 A1 CS A0 A1 A2 A3 2 X4 Decoder 21 Memory Map and Addresses The memory map is a picture representation of the address range and shows where the different memory chips are located within the address range. 0000 0000 EPROM 3FFF 4400 Address Range of EPROM Chip Address Range RAM 1 RAM 2 RAM 3 Ad dress Range of 1st RAM Chip 5FFF 6000 Address Range of 2nd RAM Chip FFF 9000 A3FF A400 Address Range of 3rd RAM Chip RAM 4 F7FF FFFF Address Range of 4th RAM Chip 22 Address Range of a Memory Chip The address range of a particular chip is the list of all addresses that are mapped to the chip. An example for the address range and its relationship to the memory chips would be the Post Office Boxes in the post office. †¢ Each box has its unique number that is assigned sequentially. (memory locations) †¢ The boxes are grouped into groups. (memory chips) †¢ The first box in a group has the number immediately after the last box in the previous group. 23 Address Range of a Memory ChipThe above example can be modified slightly to make it closer to our discussion on memory. †¢ Let’s say that this post office has only 1000 boxes. †¢ Let’s also say that these are grouped into 10 groups of 100 boxes each. Boxes 0000 to 0099 are in group 0, boxes 0100 to 01 99 are in group 1 and so on. We can look at the box number as if it is made up of two pieces: †¢ The group number and the box’s index within the group. †¢ So, box number 436 is the 36th box in the 4th group. The upper digit of the box number identifies the group and the lower two digits identify the box within the group. 24The 8085 and Address Ranges The 8085 has 16 address lines. So, it can address a total of 64K memory locations. If we use memory chips with 1K locations each, then we will need 64 such chips. The 1K memory chip needs 10 address lines to uniquely identify the 1K locations. (log21024 = 10) That leaves 6 address lines which is the exact number needed for selecting between the 64 different chips (log264 = 6). 25 The 8085 and Address Ranges Now, we can break up the 16-bit address of the 8085 into two pieces: A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 Chip Selection Location Selection within the ChipDepending on the combination on the address lines A15 – A10 , the address range of the specified chip is determined. 26 Chip Select Example A chip that uses the combination A15 – A10 = 001000 would have addresses that range from 2000H to 23FFH. Keep in mind that the 10 address lines on the chip gives a range of 00 0000 0000 to 11 1111 1111 or 000H to 3FFH for each of the chips. The memory chip in this example would require the following circuit on its chip select input: A 10 A 11 A 12 A 13 A 14 A 15 CS 27 Chip Select Example If we change the above combination to the following: A 10 A 11 A 12 A 13 A 14 A 15 CSNow the chip would have addresses ranging from: 2400 to 27FF. Changing the combination of the address bits connected to the chip select changes the address range for the memory chip. 28 Chip Select Example To illustrate this with a picture: ? ? in the first case, the memory chip occupies the piece of the memory map identified as before. In the second case, it occupies the piece identified as after. Before Af ter 0000 2000 23FF 2400 27FF 0000 FFFF FFFF 29 High-Order vs. Low-Order Address Lines The address lines from a microprocessor can be classified into two types: High-Order ? Low-Order ?

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Economics - Research Paper Example (Clark, (2006)) In the early 80's the economy experienced a recession and this was followed by an economic boom in the late 80's, the fiscal policy measures were aimed at imposing cyclical adjustment, the fiscal policy for the recession of early 80's was contractionary fiscal policy and this led to a reduction in public sector deficits. In the economic boom of the late 80's fiscal policies were expansionary was recorded following and surpluses of the late 80's were turned into deficits in 1990. Expansionary fiscal policies were used in the following years and this saw a further increase in deficit whereby a 5.5% of GDP deficit was recorded for the year 1992 and 1995, this increase in borrowing led to an increase in deficits whereby it reached 7.8% of GDP in the year 1993, there was a further decline in borrowing and in 1998 the economy recorded a surplus reaching 2.0% of GDP in the year 2000. From the above it is evident that in 1997 and 1998 and also for the year 2006 and 2007 sound policies were implemented and this was a reduction in borrowing leading to better economic growth and performance. (Clark, (2006)) From the above chart it is evid... In the economic boom of the late 80's fiscal policies were expansionary was recorded following and surpluses of the late 80's were turned into deficits in 1990. Expansionary fiscal policies were used in the following years and this saw a further increase in deficit whereby a 5.5% of GDP deficit was recorded for the year 1992 and 1995, this increase in borrowing led to an increase in deficits whereby it reached 7.8% of GDP in the year 1993, there was a further decline in borrowing and in 1998 the economy recorded a surplus reaching 2.0% of GDP in the year 2000. From the above it is evident that in 1997 and 1998 and also for the year 2006 and 2007 sound policies were implemented and this was a reduction in borrowing leading to better economic growth and performance. (Clark, (2006)) Part (b) Data plot for the years 1996 to 2006: (i) The public sector net borrowing The chart below summarises the public sector net borrowing for the year 1996 to 2006, data was retrieved from National Statistics (2009) From the above chart it is evident that in 1996 to 1997 public borrowing was negative, however public sector borrowing increased and for the year 1998 to 2001 public sector net borrowing was positive, this was followed by a decline in borrowing in 2002 to 2006 the public sector net borrowing was negative. This means that there has been cycles of increase and decline in the public sector net borrowing, this also shows that there are period of deficits and surpluses from the chart above meaning that in some years the government spending was less than income resulting into surpluses, while in the other period spending was greater than income resulting into borrowing. From

Journal reflection (se instructions) Essay Example | Topics and Well Written Essays - 1000 words

Journal reflection (se instructions) - Essay Example I was relieved by the arrangement and hoped this would allow me to focus on them better. However, my initial relief was quickly replaced by apprehension when I realised that it was a full inclusion class, containing students of different races and gender and disabilities. The realisation did unnerve me a little for I was plagued by the thought of doing justice to them all and provide them with a good learning experience. At the outset, the students seemed comfortable. But I could discern that some of them were quite occupied with toys whereas there were others on a lookout for a similar preoccupation but not finding any, seemed on the brink of mischief. My initial endeavour was to divide them in random groups of five, which would make it easier to supervise. Students then were given different tasks to be carried out as groups under our supervision. For example, a construction model was handed out to students who had to create a replica on the basis of a picture provided. Such an activity not only gave the chance to introduce new things to them but also allowed interaction between students. Thus we began planning activities that would require students to interact with another and help them build social competency skills. I was aware about the need to maintain multiculturalism in my teaching since I had a lot of Indian, Chinese and Hispanic students in my class. We decided to allot one day of the week and call it â€Å"Culture Day†, where the classroom and activities will be designed to acquaint children with that particular culture. Moreover, the fact that I had read on my students’ cultures helped me since I could interpret their behavioural traits. I understood the importance of participation of the student’s families to help me with this endeavour and sought their collaboration. Yet another problem I faced was of teaching disabled children. These children were finding it difficult to cope with other

Comprehensive classroom management plan Essay Example | Topics and Well Written Essays - 1250 words

Comprehensive classroom management plan - Essay Example Philosophical Statement I believe that an effective classroom management puts into consideration the unique individual capability in need of a safe, supportive, and a motivating environment in which to improve socially, emotionally, and intellectually towards building a successful career. It is my wish as a professional educator to assist my students to reach their full potentials by providing the conducive and supportive environment, which encourage the sharing of various classroom and coursework ideas. I expect the students in my classroom to have diversified levels of learning desires in their preferred areas. I feel that a learning community is in a way that the students, teachers and parents, uncover an environment that encourages a positive student-teacher relationship and effective parent-teacher relations. It is my responsibility to ensure that there is no student isolated from accessing equal education in my classroom. Equally significant to students’ self-esteem and self-empowerment is have an opportunity to contribute towards relevant issues in classroom meetings. Scheduling regular classroom meetings helps identify individual student needs fostering confidence and support among students. Inviting students’ dialogue about what affects them and their contributions on the learning process contributes to learning directed towards the students’ needs and interests. I believe group work is a key to a supportive learning process in a classroom. My profession is engrossed to ensuring that individual students potential are nurtured efficiently and provide an environment that encourages talent growth for students academically, socially, and psychologically. I see my role as an educator as ensuring that course content knowledge is transferred to students. Moreover, I am committed cultivating the students’ critical thoughts capabilities by providing the relevant information and will strive towards instilling curiosity among students, which will create a challenging learning environment. Classroom Arrangement General classroom arrangement is as shown in the classroom map below, designed to ensure minimal distractions and a spacious student seating arrangement for ease of movement. On entering the classroom, the first thing the students see the bulletin placed direct situated directly to the entrance. This sets students mind on what to expect for the day such as lecture topic, assignments, and classroom meetings. On the entrance, a tray containing common commodities such as pencil sharpeners whereby students can pick one in case they left their sharpeners home. The carpet on the floor brings a sense of comfort to the students setting a comfortable learning environment (Fraser, 2012). The bags and other student belongings are packed at the back of the classroom to minimize distractions and ease movement. The desks are spacious and easily accessible to all students including those with physical disabilities (Hallah an et al, 2012). Several resources are strategically arranged in the classroom to facilitate studies and research carried by the students. The computers are placed on close to the walls to

Comparative Aanalysis of Dell And Apple Laptop Marketing Essay

Comparative Aanalysis of Dell And Apple Laptop Marketing - Essay Example Apple’s brand personality is about removing complexity from consumer lifestyle through technology and the humanistic governance structure of Apple as a consumer-centric brand. 2. Market review Apple is much more transparent and accountable for its failures and successes associated with tangible product as part of the marketing mix. Apple performs what is referred to as movement marketing, a new marketing model that is strongly customer-centric, using corporate values as a foundation of sharing with consumers and being able to tap into their pre-existing values and lifestyle beliefs. Apple embraces social media as one platform by which to perform this movement marketing, using this forum to enhance customer relationship management and also to consistently reiterate what Apple believes in rather than simply expressing to target consumers the tangible benefits of various laptop products. This is the genuine key to brand loyalty (Goodson 2011). Making use of social media, such as Twitter and Facebook, provides Apple with unique opportunities to illustrate its belief in establishing effective, long-term customer relationships in key target demographics. Having established brand loyalty founded on years of consumer-accepted innovation launches that revolutionized the computing experience and with strict focus on customer relationship management philosophy. This provides Apple significant advantages over competition as once brand loyalty is established, it allows companies to position the brand under a premium pricing model (Chaudhuri and Holbrook 2001). Loyal customers are more apt to spend higher resources on their favourite brands and will be more active... This paper stresses that using values and principles at the corporate level as a promotional tool is unique in this technology industry and continues to provide greater sales volumes and the ability to expand various Apple branded product lines to include new innovation or supplementary service offerings. The report makes a conclusion that Dell must accept its current market position as a value-conscious brand that is aligned with consumer expectations for quality and excellence in service and support as it cannot justify premiumisation at this time. Dell unfortunately must rely on costly promotional ventures in order to produce greater revenues, however these efforts continue to put Dell back on the proverbial competitive map as a brand that can adjust with consumer needs and changing market conditions. The author of the paper declares that Apple gains much market loyalty and positive brand sentiment in its key target markets by extolling genuine, heartfelt connections between business and consumer which leads to brand attachments and avoids the risk of brand defection in dedicated target markets. Dell is missing opportunities to add a humanistic element into the marketing mix that can be accomplished, at low cost, through social media outlets. Apple, on the other hand, can benefit f rom Dell’s customization strategy, offering similar customized offerings based on aesthetics. Apple is currently differentiated from lower-priced competitors such as Dell.

House of Lords Reform Essay Example | Topics and Well Written Essays - 1250 words

House of Lords Reform - Essay Example 110). That same year the government took its first significant steps in reforming the House with the Constitutional Reform Act. This act mandated the Supreme Court of the United Kingdom to take over the existing role of the Law Lords, in addition to taking on a role in the Judicial Committee of the Privy Council. It also removed the powers of the Speaker of the House of Lords and Head of the Judiciary of England and Wales from the office of Lord Chancellor. This change has been the most contentious of those proposed. The number of elected representatives that should be allowed has been the subject of considerable debate. It was proposed that 120 members be elected by the public, 120 appointed by a statutory independent commission and the rest would be appointed by political parties in proportion to votes received by a party at the most recent general election. Despite the debate surrounding the number of members a larger issue is at stake. In the report put forward by Clarke, Cook, Tyler, Wright and Young (2005) they claim that it is not so much the number of elected members but rather the powers they will receive that is at issue (p. 8). They state, "Whilst there has been a great deal of support for the introduction of elected members, some in the political world have been concerned that this would make the second chamber more powerful, and therefore result in a challenge to the traditional primacy of the House of Commons" (p. 8). merits and dismerits: There is little doubt that the introduction of elected members to the House of Lords would allow for a greater degree of democratic representation than is seen today, particularly within the regions. Yet, it could cause an unfavorable change in the balance of power between the two houses if elected members do not take the spirit of the Salisbury Doctrine into consideration, something many doubt would happen. Roger and Walters (2004) state the Salisbury convention is perhaps more a code of behaviour for the Conservative Party when in opposition in the Lords than a convention of the House. Indeed it is a moot point whether, following the passage of the House of Lords Act 1999, the expulsion of the hereditary members and the ending of the overwhelming numerical advantage of the Conservative Party, the Salisbury convention as originally devised can have any continuing validity (p. 19)1. If the House of Commons and the Executive wish for there to be a check on the Ho use of Lord's powers of bill prevention they must look to making such limitations. 2. The reduction of the number of House members Currently the House of Lords has over 700 members and is one of the largest parliamentary chambers in the world. Although, since members are appointed for life and often reach an age where they cannot sit in on House meetings as often, attendance is considerably lower than the total number of

The War on television screens in American living rooms Essay Example for Free

The War on television screens in American living rooms Essay The War on television screens in American living rooms has made Americans far more anti-war than anything else. The full brutality of the combat will be there in close-up and in colour, and blood looks very red on the colour television screen. (A statement made by a BBC commentator in 1970 to members of the British armed forces). This statement suggests that television was an important reason why the United States lost the war in Vietnam. Is there sufficient evidence in sources D to L to support this interpretation? Use the sources and your own knowledge from your studies to explain your answer. The sources are not sufficient in themselves to support the interpretation but when put together with my own knowledge there is substantial evidence. The colour television made the images that were sent home more graphic and as the BBC commentator said, blood looks very red. We know that the U. S were unable to defeat Guerilla tactics and this was a major reason why the U. S lost the war in Vietnam. For example Source J shows how much the war changed the attitudes of many U. S civilians who have previously supported the war. Kent state was highly publicized and it showed how the war was destroying humanity. The scenes were widespread and they showed just what was going on. This shocked America into realizing what the effects of the war were on America. Source D is a North Vietnamese propaganda poster showing the problems that the Americans faced when trying to defeat Guerilla tactics. It shows the North Vietnamese hiding in the jungle and American soldiers searching for them. The V. C are waiting to ambush them. This source is fairly sufficient to support the statement because it shows the difficulties that the U. S suffered when trying to defeat Guerilla tactics. In the background we can see some trucks and this could be the Ho Chi Minh trail but we cannot be certain. The Ho Chi Minh trail was primarily a trail for North Vietnamese supplies to be moved into South Vietnam. Source E is a photograph of napalm victims. This picture was circulated around America during the war and just showed the extent of the chemical weapons that the U. S were using to try and win the war. It shows a young girl and a young boy running down the street after a napalm attack and the young girl has no clothes on due to the fact that napalm has burned through them and gone on her skin. Due to the fact that this particular picture was published everywhere it is probably one of the most important pictures ever captured to show the effects of the chemical weapons that the U. S were using and shows the impact the war was having on society. In the background we can see American soldiers with cameras. When this picture got home and was seen by American civilians they were disturbed by it. Many were unaware of the kind of attacks that were taking place and were shocked to see these kinds of pictures. The media that was sent home was an extremely significant part of turning the Americans against the war. Another reason was that soldiers were coming home either severely injured or with missing limbs. The distress that was caused to families who had to be told that their sons/daughters were dead was so upsetting that they started to go on anti-war campaigns. In each rank there was a camera man who was there to capture pictures and footage of the events as they happened. Source F is a description from soldiers talking about the difficulties of fighting guerillas. The source is written by an American journalist. He says how hard it is for soldiers to react when a mortar shell lands in the middle of the patrol. The soldiers dont know whether they should kill all the villages around them even though most have nothing to do with the war and want to stay away. This is an ironic situation for the soldiers to be faced with. The source is really telling you about the horrors of the war. This source cannot really be linked to the question as to whether colour television was an important reason why America lost the war. Source G is a source about a soldiers reaction to the My Lai massacre. Soldiers joined the war campaign because they thought they were doing something courageous for their country but were stunned when told to start firing upon unarmed civilians. Hundreds of civilians were killed just because they were Vietnamese. When the My Lai massacre reached the U.S it sent shockwaves through the US political establishment, the militarys chain of command, and an already divided American public. Camera footage was recorded and sent home and this was distressing for them. They realised what they had got themselves into and the scenes captured were made more horrific by the colour television. This is why we can say that the colour television was an important reason as to why the U. S lost the war in Vietnam. Source H is a British cartoon showing the costs of the Vietnam War. The train is aptly named; the U.S Economy and the workers in the carriages are chopping the carriages up and the pieces of wood have Great Society written on them. The cartoon is trying to show that President Johnson has destroyed society by going to Vietnam. Source K just shows that America wasnt the only country that was against the war. In April 1969 48% of Australians wanted their country to carry on fighting in the war but by October only 39% wanted them to. This just shows that the war was changing peoples opinions about what they thought was right. The colour television was not just in America and the scenes captured were just as horrific to the Australians as they were to Americans. The statistics show that there must have been some logical reason for the change in results and we have to consider that the colour television was one of them. I have studied all the sources and when added together with my own knowledge they are fairly reliable in saying that the colour television was an important reason why the U. S lost the war due to the fact that peoples opinions changed with time and we know that pictures look more graphic when in colour.

Assessment of the Red Bull Business Plan

Assessment of the Red Bull Business Plan Red Bull is an adaptation of the Thai energy drink Krating Daeng, which means Red Bull. The company was founded by Thai national Chaleo Yoovidhya and Austrian national Dietrich Mateschitz. Together with his son, Chaleo owns a controlling 51 percent interest in the company; however, Mateschitz is responsible for the companys operations through the Austrian company Red Bull GmbH.[1] 1.1 Product Red Bull is a sweet, caffeinated drink aimed to give consumers the high energy kick. Available only in rather expensive 250ml cans, 350ml bottles, with 4 packs and only two flavours (original or sugar-free). It contains caffeine, taurine, glucuronolactone, and B vitamins. Founded in 1984 by Austrian businessman Dietrich Mateschitz, Red Bull has become the worlds leading energy drink, a staple in many young, and active peoples lives. 1.2 Competitors Big global companies such as Coca Cola and Pepsi have introduced their own energy drink versions to their product base. Mother (by Coca Cola), Amp (Pepsi), V, Battery, 180, RedEye and Bennu being just some in the ever-growing energy drink market. Competition also presents itself in original sports drinks, such as Gatorade (Pepsi) and Powerade (Coca Cola). Furthermore, premixed alcoholic drinks like the Smirnoff range form part of the competition. 1.3 Industry Red Bull has becoming hugely successful and operates within the global soft drink marketplace. Within the soft drink industry its niche is the energy drink market, of which Mateschitz was largely responsible for creating. Red Bull currently is the leading energy drink across the entire globe. It holds 70% of the market worldwide (Gschwandtner, 2004). Once the drink was passed by health ministries, Red Bull entered the Austrian market, soon thereafter then moved into Germany, United Kingdom and the USA by 1997. 2. Needs, Wants and Demands satisfied by Red Bull 2.1 Needs There are three basic human needs that Red Bull satisfies, physical, social and individual needs. Human needs are states of felt deprivationà ¢Ã¢â€š ¬Ã‚ ¦ marketers do not invent these needs; they are a basic part of human makeupà ¢Ã¢â€š ¬Ã‚ ¦People in industrial societies might try to find or develop objects that will satisfy their needs. (Kotler et al. 2006) Firstly, a physical need is when 4.1. Recommendations For Red Bull To Sustain Their Marketing Momentum The marketing strategy of Red Bull can be considered as one of the most successful one over the years. Red Bull has been famous for building a beverage brand without relying on mass-media. The central component in all marketing activities of Red Bull was Word- of mouth. Besides, Red Bull also created adult cartoon advertisement, pushed trial programme, invented an extensive network of events, sponsored leading athletes of extreme sports and branded refrigerated sales units to complete their marketing strategy. However, in order to sustain the marketing success, besides their traditional marketing campaign, we think that Red Bull need to take the following actions: Ø Boosting mass-marketing campaign to embed the image of Red Bull an energy drink- in customers minds: in the current harsh competition market, where multiple brands of energy drinks are available, it is hard for Red Bull to keep their position as the first choice in customers minds when they need an energy drink if customers do not have chance to see the image of Red Bull regularly. Therefore, now it is the time for them to use other tools like billboards, banner ads or posters at the public places to maximize contact with customers. Ø Increasing advertising on the internet: as the internet is so popular now and more and more people spend much of their time surfing the internet, Red Bull also needs to popularise their brand through some activities on the internet like creating some extreme games online and advertising on appropriate websites which are quite familiar with students and business people in different countries. Ø Diversifying their products: Red Bull should show their innovation to customers to freshen the image as well as to create entry barriers against other competitors through product diversification. They can introduce new kinds of drink with more vitamin plus or more flavours but they have to make sure that the new kinds are also energy drinks to maintain the Red Bull Equity Red Bull Brand Equity According to Keller (2008, p 53), brand equity is the strong, favorable and unique brand associations in the memory of customers. He goes on to identify (p 54) two sources of brand equity: 1.) Brand Awareness; and 2.) Brand Image. Red Bull has well defined tactics for both sources. The Brand Awareness Source for Red Bull Brand Equity Keller (p 54) notes the key elements of Brand Awareness: 1.) Recognition; and 2.) Recall. He postulates that if buy decisions are made at the point of purchase, then brand name, logo, packaging and the other elements of brand recognition are important factors. If the buy decision is made before arriving at the point of purchase, then brand recall is centrally important. Duncan (2005, p 140) concludes that low-involvement purchase is usually done for products that are relatively cheap, bought frequently, and are low risk. In such cases, in addition to traditional advertising with its reach and frequency drills, it would be productive to spend time getting the name, logo and packaging correct. Red Bull did just this. The Pearson Case Study 4 (2006, p 70) describes how Red Bull selected a distinctive, slim can. They also created a prominent and eye-catching logo of two bulls and a yellow sun. Package wording effectively communicates the products benefits: Energy Drink. The packaging is an important part of the branding, as we might expect for a low-involvement product. Pearson Case Study 4 goes on (p 70) to note that changing the carefully selected package elements, in Germany substituting a glass bottle for the slim can, resulted in a dramatic drop off in sales. To increase brand recall, Keller (p 55) advises that a slogan or a jingle can establish the memory linkages that improve recall. Pearson Case Study 4 (p 69) relates that Red Bull developed an effective slogan, Red Bull gives you wiiings. They use little advertising but when they do it consistes of unusual animated shorts that end with the Case 2 Red Bull Red Bull, using unconventional marketing tactics, has uniquely positioned itself in the beverage industry. Red Bulls unique positioning has allowed it to capture a considerable amount of the energy beverage market share in the countries it is distributed in. Although the companys financial information is not released to the public, it appears Red Bulls marketing strategies have been successful in terms of market share, revenue, and units sold. While I personally think overall the tactics will prove successful for years to come, the same mysterious quality surrounding the drink that has proven successful currently likewise has the potential to erode the brands equity in the future. Unique positioning strategies targeting high-school burnouts and college students, nightclubbers, and athletes have built the brands equity. Grassroots marketing campaigns emphasize the drinks image as being a cool and trendy drink for cool and trendy young adults. Word of mouth and an intentionally vague strategy have made the brand mysterious. By not emphasizing what the company itself feels are the products strengths, it allows consumers to decide for themselves, as well as facilitates the emergence of rumors, some quite outlandish, adding to the drinks perceived value and increasing the brands equity. Red Bull does not have a passive hand, however, in the marketing of its energy drink. The company provides college students free drinks to give away at parties and owns sports teams and events. All of these branding events, unconventional as they are, align well with the products perceived unconventionality, and are strong elements of the brands strong equity, many of the tactics, including those contributing to the lack of public information concerning the company and the Red Bull drink, also provide the potential to erode the brands equity. Health officials have concerns over its ingredients and it has not been approved for sale in Canada or France. It has been linked to a number of deaths and it appears particularly dangerous when mixed with alcohol. The company also has created untrue documentaries. As Bob Walker states in his article Observer Bull Marketing, Red Bull has never let the truth get in the way of its brand message. As more and more consumers are becoming health conscious consuming less carbohydrates and sugars, seeking out organic foods, and being weary of what they put in there bodies, they will be less likely to drink Red Bull, especially with the uncertainty regarding the effects of its ingredients. I have never had a Red Bull and would not put something made of ingredients of uncertain effects in my body. Further, although the company contends it does not market Red Bull in bars or for use in conjunction with alcohol, many bars carry Red Bull and the majority of Red Bulls college-aged consumers drink it in conjunction with alcohol, particularly with vodka, an obvious dangerous mix, as Red Bull is an upper and alcohol is a depressant. Although I may not be representative of the majority of consumers, the companys somewhat deficient corporate ethics make me cautious of trusting the brand and wanting to try its drink. As the number of reported deaths increase and speculation over its potentia lly harmful health effects grows, brand equity will likely erode. While one might argue these factors serve to further contribute to the brands mystique and therefore increase equity, over time I think lack of public information and an increase in negative publicity will erode the brands equity. The fact that France and Canada have not approved Red Bull for sale in their countries is indicative of a less than inconsequential health issue surrounding the drink and the lack of ability of the company to reach these markets prevents the company from building brand equity in these locations, no matter how well marketed the product may be.

Home-Schooling Essay -- Education Teaching Learning Essays

Home-Schooling At least once in a child’s lifetime they wish that they were home-schooled instead of attending a public school. Imagine how nice it would be to have school right in your own home. It was stated that in the year 2001, over two million children were home- schooled in the United States (#1 Home Schooling Information and Software, 2003). This number continues to increase each year. Some believe home-schooling gives a child more attention and ensures a more intimate and personal environment which may in turn lead to a better education. Others, however, believe those who are home schooled will have trouble with social interactions. Home- schooling has both many benefits and drawbacks which will be addressed in this paper. There are many positive aspects of such educational facilitation. Statistics have shown that home-schooled children achieve high standards of academic success and excel socially, according to research from the Home-school Legal Defense Association (HSLDA). As seen through many cases, home-schoolers are better adjusted in society and are more likely to be engaged in their communities. They may not be in a â€Å"school room† situation, where they are among other children of the same age for the entire length of a school day, but they are comfortable working and socializing with people of all ages. Home-schoolers are often heavily involved with scouts, church groups, music lessons, sports teams, and volunteer work. These activities show their socialization skills with their communities, much of which is not done by children in public school systems. Many argue that home-schooling in general makes children more mature and better prepared for the â€Å"real world.† Pub lic schools are said to provide... ...com/Home-Schooling-Statistics.html Home School Association of California. (2001). Why Homeschool? Received November 22, 2003, from http://www.hsc.org/why.html Home School Legal Defense Association. (2003). Home-Schoolers are Socially Adjusted, Study Shows. Retrieved November 21, 2003, from http://www.hslda.org/docs/link.asp?URL=http%3A%2F%2Fwww%2Efamily%2Eorg%2Fcforum%2Ffnif%2Fnews%2Fa0028919%2Ecfm Minority Homeschoolers of Texas. (2001). Cost of Home Schooling. Received November 21, 2003, from http://www.mhot.org/cost.html Nantus, Sheryl. (2002a). Home Schooling, is it for you? Received November 21, 2003, from http://utut.essortment.com/homeschooling_oik.htm Nantus, Sheryl. (2002b). Information on the Pros/Cons of Practical at Home Schooling Programs. Received November 21, 2003, from http://papa.essortment.com/ homeschoolingi_rfih.htm

Cheating :: essays research papers

~~~~~~ Cheating ~~~~~~ Cheating, We've all done it at least once in our lives, in all types of situations. Its human nature to want to win, and some of us will go against the rules to do so. It can be harmless, but in many cases it is annoying, or even hurtful. So, why was cheating and certain zone hacks become such a large problem in the Age games? Anonymity plays a big part in this. Behind the buffer zone of a computer screen and several hundred miles of telephone wire, people don't have to worry about upsetting someone else by playing unfairly, cheating, or exploiting bugs. Its also easy: it's far easier to download a hack, and get an advantage in a game than to actually practice and become good. For example, way back when I was playing a lot of AoE over the Zone. I faced up against a player with a name such as CrackDevilz or something similar. Two minutes after the game started he had sent an attack with an obscene amounts of units, all the while taunting and even boasting about his ability to cheat. Another factor that adds to this problem is the lack of maturity or even common courtesy in many of the players in the Age community. They simply don't care about wasting other people's time, upsetting others, or unbalancing a ladder or league system that someone has put a lot of time into creating. When these people do cheat, they often do not refrain from crude insults or taunts. This isn't a problem for experienced players; most people I know would just simply laugh at the idiocy of their opponent, but for new players, it can be pretty disheartening. In many ways these cheaters can have a very bad effect on the Age games. Some new players can actually be scared off or even turned away from a game simply from a single bad experience. They may assume all players they will meet are immature and rude, and just not put any time into trying to play the game again. This line of thought leads into another problem found in the zone. The rating system! To be honest, I don’t like it; players become too obsessed with there ratings. Have you ever lost a game and went â€Å"DAMN IT!† not necessarily because you lost, but because when you look at your nick again it will be down 8 points.